When a semiconductor chip is designed, it is quite common to find that there is no package available which is compatible with the chip for the purpose of interfacing the chip to a next level of packaging, e.g., to a printed circuit board. Accordingly, there are literally thousands of single-purpose semiconductor chip packages available; even in a 40 pin design, there are likely 60-80 variations available.
Fabricating specialized packages for each new chip design becomes expensive, particularly for chip designs having 200 to 300 pads, each requiring connection to the package for signal, power, or ground. Unless the chip is properly designed for a pre-existing package, connections by way of wire bonds or thermally activated bonding (TAB) connections cannot be made; in other words, if the chip has not been laid out so that direct connections from the edges of a chip can be made to corresponding signal, power or ground pads on the chip package, a special package must be designed and fabricated, resulting in present-day costs of $30,000 to $80,000 per chip package, typically $45,000 for a sophisticated package.
A significant problem with making the pads located on semiconductor chip packages available for handling either signal, power or ground is that special design considerations must be adhered to for power or ground paths that do not apply to signal paths. It is not uncommon in semiconductor chip packages for signal leads within the package to have relatively high resistance and inductance values, e.g., a total resistance on the order of 1 ohm and an inductance on the order of 2 nanohenries/cm; such signal path values are normally acceptable to the designers of most chips. On the other hand, most chip designers would like a relatively low resistance and inductance path between power and ground pads and corresponding next-level-of-packaging power or ground connectors. For example, many semiconductor chip package specifications require a resistance value of less than 0.1 ohm, and an inductance value in the picohenry range for power or ground paths is frequently desirable. Accordingly, it is normally not acceptable to simply use the electrical paths available through what are originally designed to be signal paths within a chip package for power or ground connections.
These problems are solved by a semi-conductor chip package comprising the present invention, which permits individual pads on the package to function either as signal, power or ground; in addition, this selectivity is accomplished in the first preferred embodiment while attaining a typical power and ground path having a resistance of less than 100 milliohms, typically 35-50 milliohms, and having an inductance of less than one nanohenry.